Key Takeaways & Executive Findings
- •• • Forward power flow causes the VSC input impedance to exhibit negative impedance characteristics, leading to cascaded system instability and bus voltage oscillations at rated power (800 V DC bus, 125 V battery, 100 A AC current), whereas reverse power flow yields positive output impedance with superior stability margins—a critical distinction for bidirectional PCS operation in battery energy storage systems. • • The proposed capacitor current observer eliminates the need for high-precision current sensors, reducing hardware cost while achieving effective impedance reshaping; experimental waveforms under condition 3 show bus voltage oscillation suppression within 40 ms and stable 800 V regulation, confirming practical viability for commercial PCS. • • Impedance optimization reduces the source converter output impedance resonant peak and weakens the load converter negative impedance, preventing impedance magnitude intersection; this expands the stable operating range of the two-stage PCS, validated by experimental results showing consistent performance with simulations under 200 ms time scale and 100 V/div bus voltage resolution. • • The study establishes that stability degradation in two-stage PCS arises from cascaded coupling effects often neglected in single-stage designs; the bidirectional impedance models for DC/DC and VSC provide a generalizable framework for analyzing and mitigating oscillations in renewable energy integration and microgrid applications.
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Abstract
This paper addresses the prevalent design deficiency in two-stage power conversion systems (PCS), where single-stage converter stability is prioritized over cascaded coupling effects, leading to reduced system stability and DC bus voltage oscillations. By establishing bidirectional impedance models for the DC-side ports of both the front-end bidirectional DC/DC converter and the rear-end voltage source converter (VSC), the influence of power magnitude and direction on port impedance characteristics is systematically investigated. A novel impedance optimization control strategy based on capacitor current observation is proposed. This strategy reshapes the impedance models of both stages, reducing the resonant peak of the source converter's output impedance and mitigating the negative impedance characteristic of the load converter's input impedance, thereby preventing magnitude intersection of input and output impedances and expanding the stable operating range of the cascaded system. A state observer replaces high-precision current sensors for capacitor current measurement, reducing hardware cost. Simulation and experimental results validate the effectiveness of the proposed control strategy, demonstrating suppression of bus voltage oscillations under rated power conditions. The study reveals that stability margins differ between forward and reverse power flow: forward power flow induces negative input impedance in the VSC, causing instability, while reverse power flow yields positive output impedance, ensuring better stability margins. Future work will address transient stability under non-rated conditions such as continuous power fluctuations and weak grid with nonlinear loads.
1. Introduction
Existing commercial two-stage power conversion systems (PCS) for battery energy storage frequently prioritize the stability of individual converters during design, treating the rear-end DC/AC converter as a resistive load and the front-end DC/DC converter as an ideal voltage source. This simplification neglects the constant power load behavior of the VSC, which introduces negative impedance characteristics and triggers DC bus voltage oscillations under rated power conditions. Passive damping solutions require bulky passive components, incurring additional power losses, while active damping methods often depend on virtual impedance parameters or high-precision sensors, limiting practicality and scalability. The lack of comprehensive stability analysis for cascaded AC/DC converter systems, as opposed to DC/DC or LC-filter-based cascades, leaves a critical gap in ensuring reliable operation of two-stage PCS in renewable-rich microgrids.
This work establishes bidirectional impedance models for the DC-side ports of both the front-end bidirectional DC/DC converter and the rear-end VSC, revealing that forward power flow induces negative input impedance in the VSC, causing instability, while reverse power flow yields positive output impedance with better stability margins. A capacitor current observation-based impedance optimization control strategy is proposed to reshape the port impedances, reducing the resonant peak of the source converter output impedance and mitigating the negative impedance of the load converter. This approach prevents impedance magnitude intersection, expands the stable operating range, and eliminates the need for costly high-precision current sensors. Simulation and experimental results under rated conditions (800 V DC bus, 125 V battery, 100 A AC current) confirm the strategy's effectiveness in suppressing bus voltage oscillations, with future work targeting transient stability under non-rated conditions such as continuous power fluctuations and weak grid with nonlinear loads.
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XU Cheng, LIU Zhao, GU Qinqin, SUN Jiachen, GU Yan (2026). DC Bus Voltage Oscillation Analysis and Impedance Optimization Design for Two-Stage Power Conversion Systems. Acta Energiae Solaris Sinica. https://doi.org/10.19912/j.0254-0096.tynxb.202608_9665
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Frequently Asked Questions
What is the root cause of DC bus voltage oscillations in two-stage PCS under forward power flow, and how does the proposed control mitigate it?
Under forward power flow, the VSC input impedance exhibits negative impedance characteristics due to constant power load behavior, which intersects with the source converter output impedance, causing oscillations. The proposed capacitor current observation-based impedance optimization reshapes both impedances: it reduces the resonant peak of the source output impedance and weakens the negative impedance of the load converter, preventing magnitude intersection. Experimental results show oscillation suppression within 40 ms and stable 800 V bus voltage under 125 V battery and 100 A AC current conditions.
How does the proposed method compare to conventional passive damping in terms of efficiency and cost?
Passive damping requires bulky passive components (e.g., resistors and capacitors) that incur additional power losses, reducing overall efficiency. The proposed active method uses a state observer to estimate capacitor current, eliminating high-precision current sensors and reducing hardware cost. It achieves impedance reshaping without extra passive components, maintaining high efficiency while expanding the stable operating range, as validated by experiments under 200 ms time scale and 100 V/div resolution.
What are the stability differences between forward and reverse power flow in the two-stage PCS?
Forward power flow causes the VSC input impedance to be negative, leading to cascaded system instability and bus voltage oscillations at rated power (800 V DC bus). Reverse power flow results in positive output impedance of the VSC, providing better stability margins. The proposed control optimizes both directions, but the inherent stability difference necessitates bidirectional impedance modeling for reliable operation.
What are the limitations of the current study, and what future work is planned?
The study focuses on rated operating conditions; transient stability under non-rated conditions such as continuous power fluctuations, weak grid connections, and nonlinear loads remains unaddressed. Future work will investigate these scenarios to ensure robust performance across a wider range of operating conditions, as indicated in the conclusion.
How does the capacitor current observer reduce cost without compromising control performance?
The observer estimates capacitor current from existing voltage and current measurements, eliminating the need for high-precision current sensors that are costly and susceptible to noise. Experimental validation under condition 3 shows effective oscillation suppression and stable bus voltage regulation (800 V within 40 ms), confirming that the observer-based approach maintains performance while reducing hardware complexity and cost.
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