DC Bus Voltage Oscillation Analysis and Impedance Optimization Design for Two-Stage Power Conversion Systems
This paper addresses the prevalent design deficiency in two-stage power conversion systems (PCS), where single-stage converter stability is prioritized over cascaded coupling effects, leading to reduced system stability and DC bus voltage oscillations. By establishing bidirectional impedance models for the DC-side ports of both the front-end bidirectional DC/DC converter and the rear-end voltage source converter (VSC), the influence of power magnitude and direction on port impedance characteristics is systematically investigated. A novel impedance optimization control strategy based on capacitor current observation is proposed. This strategy reshapes the impedance models of both stages, reducing the resonant peak of the source converter's output impedance and mitigating the negative impedance characteristic of the load converter's input impedance, thereby preventing magnitude intersection of input and output impedances and expanding the stable operating range of the cascaded system. A state observer replaces high-precision current sensors for capacitor current measurement, reducing hardware cost. Simulation and experimental results validate the effectiveness of the proposed control strategy, demonstrating suppression of bus voltage oscillations under rated power conditions. The study reveals that stability margins differ between forward and reverse power flow: forward power flow induces negative input impedance in the VSC, causing instability, while reverse power flow yields positive output impedance, ensuring better stability margins. Future work will address transient stability under non-rated conditions such as continuous power fluctuations and weak grid with nonlinear loads.