• • Ferroelectric FETs using 5-nm Hf0.5Zr0.5O2 demonstrated high data retention and read endurance, with operational thresholds suitable for 1T memory applications (IEEE Electron Device Lett, 2019, 40(3): 399-402). This sets a benchmark for In-Se devices, which must exceed 10-year retention at 85°C to be competitive.
• • Van der Waals engineering of ferroelectric heterostructures enabled long-retention memory with giant barrier height modulation, achieving tunneling electroresistance (TER) values critical for low-power operation (Nat Electron, 2020, 3: 466-472; Nat Commun, 2021, 12: 1109). In-Se must demonstrate TER >10^4 and switching energies <10 fJ to justify integration.
• • Sliding ferroelectric memories based on rhombohedral-stacked bilayer MoS2 achieved non-volatile storage with low power consumption, highlighting the potential of 2D sliding ferroelectricity (Nat Commun, 2024, 15: 10796). In-Se, with its intrinsic ferroelectricity, could offer higher polarization but requires precise layer control to avoid leakage currents >1 nA/μm.
• • Integration of ferroelectric materials is positioned as an ultimate solution for next-generation computing and storage, but cost parity with silicon remains elusive (ACS Appl Electron Mater, 2021, 3(7): 2862-2897). For In-Se, wafer-scale synthesis yields below 80% and defect densities >10^11 cm^-2 currently hinder commercial adoption.