Key Takeaways & Executive Findings
- •• • Wafer-scale single-crystal TMDC growth on 150-mm wafers achieved for MoS2, WS2, MoSe2, and WSe2, eliminating grain boundaries and twin domains, which is critical for uniform carrier transport in sub-1 nm transistors. • • Introduction of a lanthanum monolayer on sapphire reduces surface symmetry from P3 to P1, amplifying the energy difference between antiparallel domains by nearly two orders of magnitude, enabling unidirectional epitaxial alignment. • • The epitaxial strategy is compatible with both thermal CVD and MOCVD, demonstrating versatility for industrial manufacturing processes. • • Wafer-scale SHG, Raman, and PL mappings confirm excellent uniformity and quality across the entire 150-mm wafer, with statistical analysis of FET arrays showing tight distributions of key electrical parameters (Vth, SS, μ, Ion, Ion/Ioff) across five dies.
Abstract
The pursuit of atomically thin semiconductors has long promised a new era in nanoelectronics. Among them, two-dimensional (2D) transition metal dichalcogenides (TMDCs), such as MoS2 and WSe2, have emerged as leading candidates for sub-1 nm transistor channels due to their ability to mitigate short-channel effects, positioning them as promising contenders for sustaining Moore's Law. However, industrial-scale application of these 2D semiconductors remains limited by a fundamental bottleneck: the scalable growth of high-quality single-crystal TMDC wafers. Conventional chemical vapor deposition (CVD) methods typically produce polycrystalline films containing mirror-twin domains and grain boundaries, which induce non-uniform carrier scattering and severely degrade electronic performance. Consequently, achieving precise control over grain boundaries and realizing wafer-scale single-crystalline 2D films is essential for the development of next-generation integrated circuits and high-performance electronic devices. Very recently, Wang and his collaborators reported a universal and robust epitaxial strategy that realizes wafer-scale growth of single-crystal TMDCs, specifically MoS2, WS2, MoSe2, and WSe2 semiconductors, on 150-mm wafers for the first time. This remarkable achievement bridges the long-standing gap between laboratory-scale synthesis and semiconductor foundry compatibility, marking a historic milestone in the evolution of 2D semiconductors 'from lab to fab'. The core innovation lies in atomic-scale interface engineering. Conventional c-plane sapphire (α-Al2O3) substrates possess a near-central-inversion symmetric surface, leading to two energetically degenerate, antiparallel orientations of TMDC domains. This symmetry inevitably causes twin boundaries. Wang's team overcame this symmetry constraint by introducing a monolayer of lanthanum (La) to passivate the sapphire surface. The La atoms induce surface reconstruction, reducing the symmetry from P3 to P1, and amplify the energy difference between antiparallel domains by nearly two orders of magnitude, thereby enabling unidirectional epitaxial alignment and the elimination of grain boundaries across the entire 150-mm wafer. Using this strategy, Wang's group successfully achieved 150-mm single-crystal wafers of MoS2, WS2, MoSe2, and WSe2 semiconductors grown by both thermal CVD and metal-organic CVD (MOCVD) methods. Wafer-scale second-harmonic generation (SHG), Raman, and photoluminescence (PL) mappings confirmed the excellent uniformity and quality of the films.
1. Introduction
The semiconductor industry faces a critical bottleneck in scaling transistor dimensions below 1 nm, where conventional silicon-based channels suffer from severe short-channel effects. Two-dimensional transition metal dichalcogenides (TMDCs) such as MoS2 and WSe2 offer a solution due to their atomic thinness and excellent electrostatic control. However, their industrial adoption has been stalled by the lack of a method to grow high-quality single-crystal wafers. Traditional CVD techniques yield polycrystalline films with grain boundaries that scatter carriers and degrade device performance, making them unsuitable for high-volume manufacturing.
This research presents a breakthrough in epitaxial growth by engineering the substrate surface at the atomic scale. By passivating c-plane sapphire with a lanthanum monolayer, the symmetry of the surface is broken, eliminating the formation of twin domains and enabling the growth of single-crystal TMDC wafers up to 150 mm in diameter. This approach directly addresses the scalability bottleneck, providing a path from laboratory research to semiconductor foundry production.
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Jun Li, Zhenjia Zhou, Libo Gao (2026). A New Era of 2D Semiconductors: From Lab to Fab. SCIENCE CHINA Materials. https://doi.org/10.1007/s40843-025-3867-1
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Frequently Asked Questions
What is the key innovation that enables wafer-scale single-crystal growth of TMDCs?
The key innovation is the introduction of a lanthanum monolayer on the sapphire substrate, which breaks the surface symmetry from P3 to P1, amplifying the energy difference between antiparallel domains by nearly two orders of magnitude. This forces unidirectional epitaxial alignment, eliminating grain boundaries across the entire 150-mm wafer.
How does the quality of the grown TMDC films compare to exfoliated flakes?
The grown films exhibit excellent uniformity and quality, as confirmed by wafer-scale SHG, Raman, and PL mappings. The statistical distribution of electrical parameters (Vth, SS, μ, Ion, Ion/Ioff) across five dies shows tight Gaussian distributions, indicating high consistency and low defect density, comparable to exfoliated flakes.
Is the growth method compatible with existing semiconductor manufacturing processes?
Yes, the method is compatible with both thermal CVD and MOCVD, which are standard techniques in the semiconductor industry. The transfer process of the 150-mm MoS2 film onto a 200-mm Si wafer demonstrates compatibility with existing wafer handling and integration processes.
What are the potential challenges for scaling this method to even larger wafer sizes (e.g., 300 mm)?
Scaling to 300 mm will require uniform lanthanum deposition and precise temperature control across larger areas. The current method has been demonstrated on 150-mm wafers, and the principles of symmetry breaking should be transferable, but engineering challenges remain in maintaining uniformity and throughput.
What is the industrial impact of achieving single-crystal TMDC wafers?
Single-crystal TMDC wafers eliminate grain boundaries, which are a major source of carrier scattering and performance variability. This enables the fabrication of high-performance, uniform transistors for sub-1 nm technology nodes, potentially extending Moore's Law and enabling new applications in flexible electronics and optoelectronics.
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