• • The ACIM array consumes 98.7% of total energy during 256 × 256 floating-point matrix multiplication, while the DDFP processor consumes only 1.3%, indicating that energy efficiency is dominated by the analogue domain and that digital overhead is minimal, which is critical for edge deployment where power budgets are constrained.
• • The quantization unit converts floating-point feature maps to INT-8 with FP-15 scaling factors, and the dequantization unit recovers FP-32 outputs, enabling high-precision regression tasks that were previously infeasible with pure ACIM systems that rely on low-precision integer computations.
• • The hybrid mapper distributes matrix multiplication across analogue and digital domains with single row and column granularity, improving array spatial utilization and floating-point compatibility, which directly addresses the limited dynamic range and noise accumulation issues that hinder ACIM in object detection and other complex regression applications.
• • The prototype integrates up to 12 memristor arrays and an RISC-V softcore CPU on a Xilinx FPGA, demonstrating a scalable and reconfigurable hardware platform that bridges analogue and digital domains, facilitating seamless deployment of neural networks with mixed precision requirements.