Key Takeaways & Executive Findings
- •• • The MoTe2/SnS2 anti-ambipolar heterojunction achieves a peak-to-valley ratio (PVR) of 465, enabling high-efficiency frequency doubling with minimal distortion, critical for analog signal processing and communication systems. • • Photodetection spans an ultra-broad wavelength range of 520–2200 nm, covering visible to short-wave infrared, with performance metrics suitable for multispectral imaging and environmental sensing. • • The device exhibits complete synaptic plasticity, including short-term plasticity (STP), long-term plasticity (LTP), and paired-pulse facilitation (PPF), essential for emulating biological learning rules in neuromorphic hardware. • • In a reservoir computing (RC) system, the device achieves 98.7% directional recognition accuracy on a vehicle motion dataset, demonstrating its potential for real-time, low-power edge computing applications.
Abstract
The escalating demands of artificial intelligence, machine learning, and neural computing necessitate multifunctional optoelectronic devices capable of integrating sensing, memory, and processing. Two-dimensional van der Waals heterostructures (vdWHs) offer unique advantages, yet their practical deployment is hindered by complex architectures and inefficient mode-switching. Here, we demonstrate a MoTe2/SnS2 anti-ambipolar heterojunction device enabling single-gate reconfiguration among frequency doubling, broadband photodetection, and neuromorphic computing. The device exhibits a peak-to-valley ratio (PVR) of 465, ensuring efficient frequency doubling. As a photodetector, it operates across an exceptionally broad spectral range of 520–2200 nm, with outstanding responsivity and detectivity. Furthermore, the device emulates complete synaptic behaviors, including short-term plasticity (STP), long-term plasticity (LTP), and paired-pulse facilitation (PPF). Integrated into a reservoir computing (RC) system trained on a vehicle motion dataset, it achieves a directional recognition accuracy of 98.7%. This work establishes a paradigm for multifunctional integration and low-power neuromorphic computing, advancing next-generation intelligent optoelectronic systems.
1. Introduction
Conventional semiconductor technologies face fundamental scaling limits in power consumption, speed, and integration density, hindering the monolithic integration of sensing, memory, and processing functions required for next-generation intelligent systems. While two-dimensional van der Waals heterostructures (vdWHs) offer atomically thin channels and gate-tunable band alignments, existing devices typically excel in a single functionality—such as field-effect transistors or photodetectors—but lack dynamic reconfigurability. For instance, asymmetric PtSe2/WSe2/Au photodiodes achieve polarity-switchable photoresponse but cannot perform synaptic encoding, while dual-mode devices often suffer from performance degradation or complex switching mechanisms. This fragmentation necessitates multiple discrete components, increasing power and area overhead.
The present work addresses this bottleneck by exploiting anti-ambipolar transfer characteristics in a MoTe2/SnS2 heterojunction. This design enables a single gate terminal to reconfigure the device among three distinct modes: frequency doubling, broadband photodetection, and optoelectronic synaptic emulation. The high peak-to-valley ratio (465) ensures clean frequency doubling, while the broad spectral response (520–2200 nm) and complete synaptic plasticity (STP, LTP, PPF) allow seamless integration into neuromorphic systems. By demonstrating a reservoir computing accuracy of 98.7% on a vehicle motion dataset, this single-gate architecture offers a compact, low-power solution for multifunctional intelligent optoelectronics, overcoming the limitations of prior multi-terminal or complex heterostructure approaches.
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Tingting Guo, Zixu Sa, Xiaoyong Jiang, Zhidong Pan, Jing Li, Yehui Shen, Jialin Yang, Chuyao Chen, Hengze Qu, Nengjie Huo, Gangyi Zhu, Xiang Chen, Jinshui Miao, Zai-Xing Yang, Shengli Zhang, Xiufeng Song, Haibo Zeng (2026). Single-gate reconfigurable multifunctional devices based on anti-ambipolar van der Waals heterojunctions. SCIENCE CHINA Materials. https://doi.org/10.1007/s40843-026-4262-7
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Frequently Asked Questions
What is the peak-to-valley ratio (PVR) and how does it impact frequency doubling performance?
The device exhibits a PVR of 465, which is exceptionally high for anti-ambipolar transistors. This high PVR ensures a sharp transition between the off and on states, enabling efficient frequency doubling with minimal harmonic distortion and high output signal purity, which is critical for analog signal processing applications.
How does the device achieve broadband photodetection from 520 nm to 2200 nm, and what are the key performance metrics?
The MoTe2/SnS2 heterojunction forms a type-II band alignment, facilitating efficient charge separation across a wide spectral range. The device demonstrates outstanding photoresponse across 520–2200 nm, with high responsivity and detectivity, though specific values are not detailed in the provided text. This broad spectral coverage is attributed to the complementary absorption of MoTe2 (visible to near-infrared) and SnS2 (visible to short-wave infrared).
What synaptic behaviors are emulated, and how are they characterized?
The device emulates short-term plasticity (STP), long-term plasticity (LTP), and paired-pulse facilitation (PPF). These behaviors are induced by optical or electrical pulses, with the conductance state modulated by charge trapping at the heterointerface. The presence of both STP and LTP allows the device to mimic biological learning and memory processes, essential for neuromorphic computing.
How is the reservoir computing system implemented, and what accuracy is achieved?
The device is integrated as a physical reservoir in a reservoir computing (RC) system. The reservoir's nonlinear dynamics, provided by the device's synaptic plasticity, map input signals into a high-dimensional space. A readout layer is then trained to classify directional motion from a vehicle dataset, achieving 98.7% accuracy. This demonstrates the device's practical utility in temporal pattern recognition tasks.
What are the potential scalability and integration challenges for this technology?
Scalability challenges include the precise alignment and large-area growth of MoTe2 and SnS2 layers, as well as the uniformity of heterojunction properties across a wafer. Integration with CMOS back-end-of-line processes requires low-temperature processing and compatibility with existing fabrication infrastructure. However, the single-gate architecture simplifies device design, potentially easing integration compared to multi-terminal devices.
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