Key Takeaways & Executive Findings
- •• • The dual-indium-source two-step growth method achieves in-plane InAs nanowires with lengths exceeding 60 μm, a six-fold improvement over the single-source method (<10 μm), enabling scalable device fabrication. • • Optimization of As beam equivalent pressure suppresses overgrowth at network junctions, yielding uniform nanowire networks critical for quantum transport experiments. • • High-resolution transmission electron microscopy confirms pure zinc-blende crystal structure and sharp Ge/InAs interface, essential for coherent electron transport. • • The method is compatible with CMOS-compatible Ge substrates, offering a pathway to integrate III-V nanowires with silicon technology.
Abstract
In-plane InAs nanowires and nanowire networks are promising platforms for electronics, optoelectronics, and topological quantum computing due to their small electron effective mass, narrow bandgap, high electron mobility, strong spin-orbit coupling, and large Landé g factor. However, their selective area growth on CMOS-compatible group-IV substrates remains challenging. Here, we report the selective area growth of high-quality in-plane InAs nanowires and nanowire networks on Ge(111) substrates by molecular-beam epitaxy. Conventional selective-area epitaxy fails to simultaneously achieve good selectivity and continuity. To overcome this, we developed a metal-sown, single-indium-source two-step growth method, which attains both selectivity and continuity but yields nanowires with rough surfaces and lengths below 10 μm. We then introduced an upgraded metal-sown, dual-indium-source two-step growth method, successfully fabricating in-plane InAs nanowires and nanowire networks with smooth surface morphology and lengths exceeding 60 μm. By optimizing the As beam equivalent pressure, overgrowth at network junctions is effectively suppressed, resulting in uniform nanowire networks. High-resolution transmission electron microscopy and Raman spectroscopy confirm the high-quality single-crystalline nature and pure zinc-blende structure of the nanowires and networks. This work establishes a foundation for fabricating high-quality in-plane InAs/superconductor hybrid nanowires and nanowire networks on Ge substrates.
1. Introduction
InAs nanowires have attracted intense research interest for electronics, optoelectronics, and topological quantum computing due to their exceptional electronic properties, including small effective electron mass, narrow bandgap, high electron mobility, strong spin-orbit coupling, and large Landé g factor. However, the scalability of free-standing nanowires is limited, prompting the development of in-plane nanowire networks via selective area growth. To date, such growth has predominantly relied on III-V substrates like InP and GaAs, which are incompatible with mainstream CMOS manufacturing. The few attempts on Si substrates have suffered from incomplete oxide removal due to Si's high deoxidation temperature, leading to poor crystal quality and rough surfaces.
This work addresses the bottleneck by employing Ge substrates, which offer a lower deoxidation temperature and thus a cleaner surface for epitaxy. The authors first demonstrate that conventional selective-area epitaxy fails to reconcile selectivity and continuity. They then introduce a metal-sown, dual-indium-source two-step growth method that decouples indium supply, enabling simultaneous achievement of selectivity, smooth morphology, and lengths exceeding 60 μm. This approach not only overcomes the limitations of prior methods but also provides a generalizable strategy for selective epitaxy of other III-V materials on non-III-V substrates, potentially enabling monolithic integration of high-performance nanowire devices with silicon technology.
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Lei Liu, Xiyu Hou, Chenkai Liu, Lianjun Wen, Donghai Li, Miaoling Lin, Ping-Heng Tan, Dong Pan, Jianhua Zhao (2026). Selective Area Growth of High-Quality In-Plane InAs Nanowires and Nanowire Networks by Molecular-Beam Epitaxy on Ge Substrates. SCIENCE CHINA Materials. https://doi.org/10.1007/s40843-025-4043-3
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Frequently Asked Questions
What is the maximum length of in-plane InAs nanowires achieved with the dual-indium-source method, and how does it compare to the single-source method?
The dual-indium-source method yields nanowires exceeding 60 μm, whereas the single-source method is limited to less than 10 μm. This six-fold improvement is critical for fabricating long, continuous channels required for quantum devices.
How does the As beam equivalent pressure (BEP) affect the morphology of nanowire network junctions?
Optimizing As BEP effectively suppresses overgrowth at network junctions, resulting in uniform nanowire networks. This is essential for maintaining electrical isolation and preventing short circuits in complex device architectures.
What crystal structure and interface quality are confirmed by high-resolution transmission electron microscopy (HRTEM)?
HRTEM confirms that the nanowires are high-quality single crystals with a pure zinc-blende structure. Elemental analysis reveals a sharp interface between the Ge substrate and InAs nanowires, with uniform compositional distribution, which is vital for coherent electron transport.
Why is Ge chosen over Si as the substrate for selective area growth of InAs nanowires?
Ge has a lower deoxidation temperature than Si, allowing more complete removal of the native oxide. This results in a cleaner surface for epitaxial growth, leading to higher crystal quality and smoother nanowire morphology, as demonstrated in this work.
What are the potential applications of these in-plane InAs nanowire networks on Ge substrates?
These nanowire networks are promising for topological quantum computing, where they can serve as platforms for Majorana zero modes when combined with superconductors. They also have potential in high-speed electronics and optoelectronics due to their high electron mobility and narrow bandgap.
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